Silicon Feeds
TSMC’s CoWoS-S is critical to the artificial intelligence era because it solves the central systems problem facing modern accelerators: computing capability is growing faster than conventional packages can supply data, power, and connectivity. CoWoS-S, meaning Chip-on-Wafer-on-Substrate with a silicon interposer, ……
As AI pushes chip packages beyond traditional wafer limits, panel-level processing is emerging as a critical path to scale advanced packaging. The post The AI Packaging Challenge: 5 Reasons Panels Are Gaining Momentum appeared first on EE Times.
GPU compute resources are scaling to support growing AI workloads, leading to further rises in the climate change impact of hyperscale data centers that rely on high-performance GPUs. To model how packaging decisions impact the carbon footprint we have estimated the embodied emissions (EE) of a chiplet-based GPU that…
SEMICON West 2026: Advanced packaging, photonics, test, and AI are increasingly intertwined; very different conversations ahead. The post Chip Scaling Moves Beyond The Transistor appeared first on Semiconductor Engineering.
ASML is building a hybrid bonding tool! The company has not announced anything yet, but its patent filings, a news report and its own roadmap all suggest so.
Intel was the first large chipmaker to start using advanced packaging methods in 2017 – 2019. But where are Intel's EMIB and Foveros technologies today and where are they heading?
Agentic AI runs its tools on the CPU, and no vendor tells you how many cores an agent needs. In this keynote at the Design Automation Conference, I compare AMD Venice, Intel Xeon 6, the Arm AGI CPU and Nvidia Vera, then follow the problem down into advanced packaging, CFETs and thermals. You also hear what EDA tools…
GlobalFoundries becomes a part of TSMC's CoWoS supply chain in the U.S.: set to participate in production of leading-edge AI and HPC accelerators without investing in leading-edge process technologies.
Broadcom's Beast XPU is coming in 2028 with 16 HBM stacks and 8 compute dies on a single package, but how do you actually build something that big? At OCP Taiwan, Broadcom's VP of ASIC products gave a talk on 3.5D heterogeneous "scale-in" packaging, covering face-to-face bonding, 8x higher thermal density, chiplet…
Hybrid bonding, the copper-to-copper joining technique that replaces solder microbumps in 3D chip stacks, is in high-volume production on logic and freshly postponed on memory.
Arm reveals more details about its AGI processors with up to 136 cores, but fails to disclose performance.
As transistor sizes shrink to their atomic limits, computing demands are only growing. Sending chips to the third dimension is the future: Chips stacked on other chips can get more work done in the same footprint, saving time and energy. A 3D chipmaking technology called hybrid bonding is leading the charge in such…
Session 7, Hot Chips 2025, Tuesday, August 26, 2025. Chair: Ronny Krashinsky, NVIDIA Memory: (Almost) the Only Thing That Matters Mark Kuemerle, Marvell Corsair - An In-memory Computing Chiplet Architecture for Inference-time Compute Acceleration Sudeep Bhoja, d-Matrix UB-Mesh: Huawei’s Next-Gen AI SuperComputer with…
Session 5, Hot Chips 2025, Tuesday, August 26, 2025. Chair: Borivoje Nikolic, UC Berkeley Celestial AI Photonic Fabric Module (PF Module) - The world’s first SoC with in-die Optical IO Phil Winterbottom, Celestial AI A UCIe Optical I/O Retimer Chiplet for AI Scale-up Fabrics Vladimir Stojanovic, Ayar Labs Passage…
Strix Halo Chip Deep-dive with a focus on AMD's next-gen die-to-die fan-out interconnect. How AMD is re-imagining Chiplet Design with ZEN 6. Learn more about the ROG Flow Z13: https://us.asus.click/Z13HY2025 Follow me on X: https://x.com/highyieldYT Follow me on Bsky: https://bsky.app/profile/highyield.bsky.social…
Hybrid bonding, the technology behind AMD's 3D V-Cache, changes semiconductor packaging. Here's how it really works. Become a supporter on Patreon: https://www.patreon.com/c/user?u=46978634 Follow me on Twitter/X: https://twitter.com/highyieldYT Follow me on Bsky: https://bsky.app/profile/highyield.bsky.social…
Samsung Electronics, a world leader in advanced semiconductor technology, today announced that it will provide turnkey semiconductor solutions using the 2-nanometer (nm) foundry process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Preferred Networks, a leading Japanese AI company. By…